15 #define CPU_EFLAGS_CARRY (1 << 0) 16 #define CPU_EFLAGS_PARITY (1 << 2) 17 #define CPU_EFLAGS_ADJUST (1 << 4) 18 #define CPU_EFLAGS_ZERO (1 << 6) 19 #define CPU_EFLAGS_SIGN (1 << 7) 20 #define CPU_EFLAGS_TRAP (1 << 8) 21 #define CPU_EFLAGS_INTERRUPT (1 << 9) 22 #define CPU_EFLAGS_DIRECTION (1 << 10) 23 #define CPU_EFLAGS_OVERFLOW (1 << 11) 24 #define CPU_EFLAGS_IOPL1 (1 << 12) 25 #define CPU_EFLAGS_IOPL0 (1 << 13) 26 #define CPU_EFLAGS_NESTED (1 << 14) 27 #define CPU_EFLAGS_RESUME (1 << 16) 28 #define CPU_EFLAGS_V8086 (1 << 17) 29 #define CPU_EFLAGS_ALIGNCHECK (1 << 18) 30 #define CPU_EFLAGS_VINTERRUPT (1 << 19) 31 #define CPU_EFLAGS_VPENDING (1 << 20) 32 #define CPU_EFLAGS_CPUID (1 << 21) 38 typedef struct registers
61 typedef struct registers4
97 wrmsr(uint32_t
id, uint64_t value);
115 io_outb(uint16_t port, uint8_t value);
133 io_outw(uint16_t port, uint16_t value);
151 io_outd(uint16_t port, uint32_t value);
203 #endif // __NO_INLINE__
__forceinline uint8_t io_inb(uint16_t port)
__forceinline void io_outb(uint16_t port, uint8_t value)
__forceinline uint64_t rdmsr(uint32_t id)
__forceinline void halt()
__forceinline void invalid_opcode()
__forceinline void io_outd(uint16_t port, uint32_t value)
__forceinline void set_pagetable(uint64_t paddr)
__forceinline void wrmsr(uint32_t id, uint64_t value)
__forceinline void enable_interrupts()
A record describing all 64-bit general-purpose registers.
__forceinline void cpuid(uint32_t code, registers4_t *regs)
__forceinline void fatal()
__forceinline void disable_interrupts()
__forceinline uint16_t io_inw(uint16_t port)
__forceinline uint32_t io_ind(uint16_t port)
x86 CPU-specific function implementations – inline assembly.
__forceinline void invalidate_page(void *vaddr)
A record describing the first 4 general-purpose registers.
__forceinline void io_outw(uint16_t port, uint16_t value)