MonkOS  v0.1
A simple 64-bit operating system (x86_64)
cpu_inl.h
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1 //============================================================================
2 /// @file cpu_inl.h
3 /// @brief x86 CPU-specific function implementations -- inline assembly.
4 //
5 // Copyright 2016 Brett Vickers.
6 // Use of this source code is governed by a BSD-style license
7 // that can be found in the MonkOS LICENSE file.
8 //============================================================================
9 
10 #pragma once
11 
12 #include <core.h>
13 
14 #ifndef __NO_INLINE__
15 
16 __forceinline void
17 cpuid(uint32_t code, registers4_t *regs)
18 {
19  asm volatile (
20  "cpuid"
21  : "=a" (regs->rax), "=b" (regs->rbx), "=c" (regs->rcx),
22  "=d" (regs->rdx)
23  : "0" (code));
24 }
25 
26 __forceinline uint64_t
27 rdmsr(uint32_t id)
28 {
29  uint64_t value;
30  asm volatile (
31  "rdmsr"
32  : "=A" (value)
33  : "c" (id));
34  return value;
35 }
36 
37 __forceinline void
38 wrmsr(uint32_t id, uint64_t value)
39 {
40  asm volatile (
41  "wrmsr"
42  :
43  : "c" (id), "A" (value));
44 }
45 
46 __forceinline uint8_t
47 io_inb(uint16_t port)
48 {
49  uint8_t value;
50  asm volatile (
51  "inb %[v], %[p]"
52  : [v] "=a" (value)
53  : [p] "Nd" (port)
54  );
55  return value;
56 }
57 
58 __forceinline void
59 io_outb(uint16_t port, uint8_t value)
60 {
61  asm volatile (
62  "outb %[p], %[v]"
63  :
64  : [p] "Nd" (port), [v] "a" (value)
65  );
66 }
67 
68 __forceinline uint16_t
69 io_inw(uint16_t port)
70 {
71  uint16_t value;
72  asm volatile (
73  "inw %[v], %[p]"
74  : [v] "=a" (value)
75  : [p] "Nd" (port)
76  );
77  return value;
78 }
79 
80 __forceinline void
81 io_outw(uint16_t port, uint16_t value)
82 {
83  asm volatile (
84  "outw %[p], %[v]"
85  :
86  : [p] "Nd" (port), [v] "a" (value)
87  );
88 }
89 
90 __forceinline uint32_t
91 io_ind(uint16_t port)
92 {
93  uint32_t value;
94  asm volatile (
95  "ind %[v], %[p]"
96  : [v] "=a" (value)
97  : [p] "Nd" (port)
98  );
99  return value;
100 }
101 
102 __forceinline void
103 io_outd(uint16_t port, uint32_t value)
104 {
105  asm volatile (
106  "outd %[p], %[v]"
107  :
108  : [p] "Nd" (port), [v] "a" (value)
109  );
110 }
111 
112 __forceinline void
113 set_pagetable(uint64_t paddr)
114 {
115  asm volatile (
116  "mov rdi, %[paddr]\n"
117  "mov cr3, rdi\n"
118  :
119  : [paddr] "m" (paddr)
120  : "rdi");
121 }
122 
123 __forceinline void
124 invalidate_page(void *vaddr)
125 {
126  asm volatile (
127  "invlpg %[v]\n"
128  :
129  : [v] "m" (vaddr)
130  : "memory");
131 }
132 
133 __forceinline void
135 {
136  asm volatile ("sti");
137 }
138 
139 __forceinline void
141 {
142  asm volatile ("cli");
143 }
144 
145 __forceinline void
147 {
148  asm volatile ("hlt");
149 }
150 
151 __forceinline void
153 {
154  asm volatile ("int 6");
155 }
156 
157 __forceinline void
159 {
160  asm volatile ("int 0xff");
161 }
162 
163 //
164 #endif // ifndef __NO_INLINE__
uint64_t rbx
Definition: cpu.h:64
__forceinline uint8_t io_inb(uint16_t port)
Definition: cpu_inl.h:47
__forceinline void io_outb(uint16_t port, uint8_t value)
Definition: cpu_inl.h:59
__forceinline uint64_t rdmsr(uint32_t id)
Definition: cpu_inl.h:27
__forceinline void halt()
Definition: cpu_inl.h:146
__forceinline void invalid_opcode()
Definition: cpu_inl.h:152
__forceinline void io_outd(uint16_t port, uint32_t value)
Definition: cpu_inl.h:103
__forceinline void set_pagetable(uint64_t paddr)
Definition: cpu_inl.h:113
__forceinline void wrmsr(uint32_t id, uint64_t value)
Definition: cpu_inl.h:38
Core include file.
__forceinline void enable_interrupts()
Definition: cpu_inl.h:134
__forceinline void cpuid(uint32_t code, registers4_t *regs)
Definition: cpu_inl.h:17
uint64_t rcx
Definition: cpu.h:65
__forceinline void fatal()
Definition: cpu_inl.h:158
__forceinline void disable_interrupts()
Definition: cpu_inl.h:140
__forceinline uint16_t io_inw(uint16_t port)
Definition: cpu_inl.h:69
__forceinline uint32_t io_ind(uint16_t port)
Definition: cpu_inl.h:91
__forceinline void invalidate_page(void *vaddr)
Definition: cpu_inl.h:124
uint64_t rax
Definition: cpu.h:63
A record describing the first 4 general-purpose registers.
Definition: cpu.h:61
uint64_t rdx
Definition: cpu.h:66
#define __forceinline
Force a function to be inline, even in debug mode.
Definition: core.h:23
__forceinline void io_outw(uint16_t port, uint16_t value)
Definition: cpu_inl.h:81